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Automatic test pattern generation
Results: 55

#	Item
21	Design Verification & Testing Design for Testability and Scan CMPE 418 Add to Reading List Source URL: www.csee.umbc.edu Language: English - Date: 2004-12-01 12:51:01 Electronics manufacturing Electronic design Design for X Design for testing Scan chain Automatic test pattern generation Integrated circuits Boundary scan Digital electronics Electronic engineering Design Electronic design automation
22	BIST Hardware Synthesis for RTL Data Paths Based on Test Compatibility Classes Nicola Nicolici, Bashir M. Al-Hashimi, Andrew D. Brown, and Alan C. Williams Nicola Nicolici Bashir M. Al-Hashimi Andrew D. Brown Add to Reading List Source URL: eprints.soton.ac.uk Language: English - Date: 2009-12-08 11:04:34 Design for testing Built-in self-test Automatic test pattern generation High-level synthesis Digital electronics Electronic engineering Electronic design automation Design
23	Combinational Techniques for Sequential Equivalence Checking Hamid Savoj1 David Berthelot1 Alan Mishchenko2 Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2010-03-23 04:39:57 Digital electronics Formal methods Logic in computer science Automata theory Formal equivalence checking Combinational logic Sequential logic Automatic test pattern generation NC Theoretical computer science Electronic engineering Applied mathematics
24	Integrating Logic Synthesis, Technology Mapping, and Retiming Alan Mishchenko Satrajit Chatterjee Robert Brayton Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2006-05-01 16:05:11 Digital electronics Electronic design Formal methods And-inverter graph Retiming Logic synthesis Automatic test pattern generation Field-programmable gate array Sequential logic Electronic engineering Electronics Electronic design automation
25	Microsoft Word - haig09.doc Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2008-03-23 19:52:58 Electronic design automation Electronic design Logic in computer science And-inverter graph Retiming Logic optimization Combinational logic Automatic test pattern generation Logic programming Electronic engineering Formal methods Digital electronics
26	Microsoft Word - haig14.doc Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2008-05-20 20:12:25 Digital electronics Electronic design And-inverter graph Retiming Logic optimization Automatic test pattern generation Combinational logic Formal verification Logic programming Electronic engineering Formal methods Electronic design automation
27	Improvements to Combinational Equivalence Checking Alan Mishchenko Satrajit Chatterjee Robert Brayton Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2006-08-09 21:17:37 Formal methods Logic in computer science NP-complete problems And-inverter graph Diagrams Boolean satisfiability problem Satisfiability Logic synthesis Automatic test pattern generation Electronic engineering Theoretical computer science Electronic design automation
28	Incremental Sequential Equivalence Checking and Subgraph Isomorphism Sayak Ray Alan Mishchenko Robert Brayton Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2009-07-12 14:37:50 Applied mathematics And-inverter graph Electronic design automation Subgraph isomorphism problem Automatic test pattern generation Graph isomorphism Theoretical computer science Mathematics Diagrams
29	Scalably-Verifiable Sequential Synthesis Robert Brayton Alan Mishchenko Department of EECS, University of California, Berkeley Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2007-10-02 14:31:33 Electronic design automation Digital electronics Logic in computer science Electrical circuits And-inverter graph Retiming Automatic test pattern generation Formal verification Combinational logic Electronic engineering Formal methods Theoretical computer science
30	Scalable and Scalably-Verifiable Sequential Synthesis Alan Mishchenko Michael Case Robert Brayton Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2008-07-28 20:26:28 Electronic design automation Electrical circuits And-inverter graph Diagrams Retiming Automatic test pattern generation Scan chain Combinational logic Sequential logic Electronic engineering Formal methods Digital electronics